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 Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
FEATURES
* * * * * * * * Spread Spectrum Clock Generator with selectable multiplier from 1x to 6x outputs. Output frequency ranges: 30MHz to 180MHz. Modulates external clocks including crystals, crystal oscillators and ceramic resonators. Selectable Center or Down Spread Modulation. TTL/CMOS compatible outputs. 3.3V Operating Voltage. Low short term jitter. Available in 8-Pin 150mil SOIC.
PIN CONFIGURATION
FIN S0^ S1^ S2 v 1 8 VDD S3 v FOUT GND
PLL701-05
2 3 4
7 6 5
FIN = 30 ~ 120 Mhz
Note: . v: 120K Internal Pull down. ^: 120K Internal Pull up.
DESCRIPTIONS
The PLL701-05 is a Spread Spectrum Clock Generator designed for the purpose of reducing EMI in high-speed digital systems. Any output frequency can be selected by programming 4 multiplier modes. The device is designed to operate over a very wide range of input frequencies and provides 1x to 4x modulated clock outputs.
OUTPUT CLOCK (FOUT) SELECTION
S0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 S1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 S2 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 S3 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 FIN Range (MHz) 30 - 60 30 - 60 30 - 60 30 - 60 30 - 60 30 - 60 30 - 60 30 - 60 30 - 60 30 - 60 30 - 45 30 - 45 60 - 120 60 - 120 60 - 120 60 - 120 FOUT X1 X1 X1 X1 X2 X2 X2 X2 X2 X2 X4 X4 X1 X1 X1 X1 Spread Spectrum modulation frequency Spread Spectrum 0.75% 1.00% -2.50% 0.5-1.5% 0.25% 0.5% 0.75% 1.00% -2.50% 0.5-1.5% 0.25-1.25% 0.5-1.5% 0.25% 0.50% 0.25-1.25% 0.5-1.5%
Rev 09/26/02 Page 1
Fin / 512
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
BLOCK DIAGRAM
XIN XOUT
VDD XTAL OSC PLL SST FOUT
S(0:3)
Control Logic
PIN DESCRIPTIONS
Name
FIN S0 S1 S2 S3 VDD FOUT GND
Number
1 2 3 4 7 8 6 5
Type
I I I I I P O P Input Clock Frequency.
Description
Digital control input to select output frequency. Has internal pull-up. Digital control input to select output frequency. Has internal pull-up. Digital control input to select output frequency. Has internal pull-down. Digital control input to select output frequency. Has internal pull-down. 3.3V Power Supply. Modulated Clock Frequency Output. The frequency before modulation is synthesized by multiplying the input frequency by 1X, 2X, or 4X, depending on S(0:3). Ground.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/02 Page 2
Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings PARAMETERS
Supply Voltage Input Voltage Range Output Voltage Range Soldering Temperature Storage Temperature Ambient Operating Temperature* TS TA -65 -40
SYMBOL
V DD VI VO
MIN.
V SS -0.5 V SS -0.5 V SS -0.5
MAX.
6 V DD +0.5 V DD +0.5 260 150 85
UNITS
V V V C C C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
2. DC/AC Specification PARAMETERS
Supply Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage Output Low Voltage Input Frequency Maximum interruption of FIN Input Capacitance Pull-up Resistor Pull-down Resistor Short Circuit Current 3.3V Dynamic Supply Current Cin1 Rpu Rpd Isc ICC No Load PIN 2, 3 PIN 4, 7 60 60 4 125 125 25 20 200 200
SYMBOL
VDD VIH VIL IIH IIL VOH VOL FIN
CONDITIONS
MIN.
3.15 0.7*VDD
TYP.
MAX.
3.45 0.3*VDD 100 100
UNITS
V V V A A
IOH=5mA, VDD=3.3V IOL=6mA, VDD=3.3V
2.4 0.4 30 120 100 MHz s pF K K mA mA
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/02 Page 3
Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
3. TIMING CHARACTERISTICS PARAMETERS
Rise Time Fall Time Output Duty Cycle Cycle to Cycle Jitter Cycle to Cycle Jitter
SYMBOL
Tr Tf DT Tcyc-cyc Tcyc-cyc
CONDITIONS
Measured at 0.8V ~ 2.0V @ 3.3V Measured at 2.0V ~ 0.8V @ 3.3V FOUT=48MHz @ 3.3V FOUT=72MHz @ 3.3V
MIN.
0.8 0.78 45
TYP.
0.95 0.85 50
MAX.
1.1 0.9 55 100 100
UNITS
ns ns % ps ps
INPUT LOGIC SELECTION THROUGH RESISTOR LOAD OPTION
VDD
R
Power Up Reset
120Kohm RB
Clock Load
XIN EN XOUT
RB Jumper options S2 Register
27KOhm
Strapping Resistor
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/02 Page 4
Preliminary
PLL701-05
Low EMI Spread Spectrum Multiplier Clock
PACKAGE INFORMATION
8 PIN Narrow SOIC ( mm )
SOIC Symbol A A1 B C D E H L e Min. 1.47 0.10 0.33 0.19 4.80 3.80 5.80 0.38 1.27 BSC Max. 1.73 0.25 0.51 0.25 4.95 4.00 6.20 1.27 A1 B e C L D E H
A
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991
The order number for this device is a combination of the following: Device number, Package type and Operating temperature range
PART NUMBER
PLL701-05 S C
PART NUMBER TEMPERATURATURE C=COMMERCIAL M=MILITARY I=INDUSTRAL PACKAGE TYPE S=SOIC
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 09/26/02 Page 5


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